How to Calculate Capacitor Charge/Discharge Time: RC Timing for Circuit Design and Troubleshooting

Q: How do I calculate the time to charge a capacitor to a specific voltage?

Use the formula t = -R × C × ln(1 - Vt / Vs), where R is the series resistance in ohms, C is the capacitance in farads, Vs is the source voltage, and Vt is the target voltage. Ensure Vt is less than Vs; otherwise, the time is infinite.

Q: What is the RC time constant and how does it relate to charge time?

The RC time constant τ = R × C is the time to reach 63.2% of the final voltage during charging. One time constant gives 63.2%, two give 86.5%, and five give 99.3%. The charge time to any threshold is a multiple of τ determined by the natural logarithm.

Q: Can I use this calculator for discharge time?

Yes. For discharge from an initial voltage Vi to a target Vt, use t = -R × C × ln(Vt / Vi). The same RC time constant applies, but the logarithm uses the ratio of remaining voltage. Discharge to 36.8% of Vi takes one time constant.

Q: Why does my measured charge time differ from the calculated value?

Common causes include component tolerances (resistor ±1% or ±5%, capacitor ±20% or more), source impedance adding to R, capacitor leakage (especially electrolytics), and loading from the measurement probe or subsequent circuitry. Always account for worst-case tolerances.

Q: What happens if I set the target voltage equal to the source voltage?

The formula gives an infinite time because the capacitor never reaches the source voltage in finite time. In practice, you cannot charge to exactly Vs; you can only approach it asymptotically. Use a target voltage of, say, 99% of Vs (which takes about 4.6τ).

Q: How does capacitor leakage current affect long-duration RC timing?

Capacitor leakage current creates a steady-state voltage error that becomes significant for high-resistance, long-duration timing applications. Per IEC 60384-4 typical specifications: aluminum electrolytic capacitors have leakage current up to 0.01 × C × V (µA) after 1 minute, where C is in µF and V in volts. For a 100 µF, 25 V capacitor, leakage is approximately 25 µA at full rated voltage. Tantalum capacitors have similar leakage with a longer stabilization time (5 minutes). Film capacitors (polyester, polypropylene) have leakage typically below 10 pA, negligible for most timing applications. Ceramic Class 1 (C0G/NP0) capacitors are similar. In a 1 MΩ × 100 µF RC circuit, leakage of 10 µA creates a 10 V drop across the leakage path at 1 MΩ, preventing the capacitor from reaching Vs. For timing intervals above 10 s, use film capacitors or low-leakage tantalum, or migrate to crystal-referenced timer ICs.

Q: What about RC timing for AC circuits and signal filtering?

The formula t = -RC × ln(1 - Vt/Vs) applies to step-response (DC charging/discharging). For AC signal filtering, the same RC product becomes the cutoff frequency parameter f_c = 1/(2π × RC) per standard circuit analysis. A low-pass filter (R series, C shunt to ground) has a -3 dB cutoff at f_c; a high-pass filter (C series, R shunt to ground) has its -3 dB cutoff at the same f_c. The RC = 100 kΩ × 10 µF = 1 s from the worked example corresponds to f_c = 1/(2π × 1) = 0.16 Hz, useful only for DC filtering. Practical AC filters use much smaller RC products (kΩ × nF for kHz cutoffs, kΩ × pF for MHz cutoffs). For AC analysis, use a separate frequency-domain calculator rather than this charge/discharge time tool.

Problem Framing

A common pitfall in RC timing design is assuming the ideal exponential model holds exactly in a real circuit. Engineers often size a timing capacitor for a 555 timer or a power-supply soft-start circuit using the textbook formula, then find the actual charge time is 20-40% longer than calculated due to component tolerances stacking. The result: a system that fails to reach its enable threshold before the microcontroller watchdog resets, or a relay that closes too late, causing inrush current to trip a breaker. These failures originate from three factors not captured by the ideal model: component tolerances (resistor ±1-5%, capacitor ±5-20% per IEC 60384 manufacturer specifications), capacitor leakage current, and loading from downstream circuit input impedance.

This calculator addresses the core screening need: given a resistor and capacitor, how long does it take to reach a specific voltage? It uses the first-order RC model that every electrical engineer learns. But the number it returns is a theoretical estimate, not a guaranteed specification. For example, a 100 kΩ resistor and 47 µF capacitor give τ = 4.7 s. Charging to 63% of the source voltage (3.15 V from a 5 V supply) takes exactly one time constant: 4.7 s. But a capacitor with ±20% tolerance can shift that to anywhere from 3.76 s to 5.64 s. If you are designing a delay that must trigger between 4.0 s and 5.0 s, the ideal calculation alone is not enough. Understanding the formula and its limits is the first step toward a reliable design. For complementary capacitor calculations in power applications, see How to Calculate Capacitor Bank Size for Power Factor Correction. For circuit-level capacitor selection at motor or feeder loads, see the Capacitor Sizing for Power Factor Correction Calculator.

Exact Formula / Method

The calculator uses the standard first-order RC transient equations. The fundamental building block is the RC time constant, τ = R × C.

τ = R × C

Charging from 0 to Vt with source Vs:
t = -R × C × ln(1 - Vt / Vs)

Discharging from Vi to Vt:
t = -R × C × ln(Vt / Vi)

Where:
- R = resistance (Ω). Typical range: 1 Ω to 10 MΩ. In power circuits, common values are 1 kΩ to 100 kΩ. In signal conditioning, values up to 10 MΩ are used.
- C = capacitance (F). Typical range: 1 pF to 10 mF. Common timing capacitors are 0.1 µF to 1000 µF.
- τ = RC time constant (s). This is the time to reach 63.2% of the final value during charging, or 36.8% during discharging.
- Vs = source voltage (V) for charging. Typically 3.3 V, 5 V, 12 V, or 24 V in digital and analog circuits.
- Vi = initial voltage (V) for discharging. Usually equal to Vs if the capacitor was fully charged.
- Vt = target voltage (V). A threshold voltage, e.g., the logic-high input of a CMOS gate (typically 0.7 × Vdd) or the dropout voltage of a regulator.
- ln = natural logarithm.

The natural logarithm appears because the capacitor voltage follows an exponential curve. The current through the resistor is proportional to the voltage difference across it, which decreases as the capacitor charges. This creates a self-limiting process: the rate of voltage change slows as the capacitor approaches its final value. That is why reaching 99% of Vs takes about 4.6τ, not 1τ. The formula represents this physical behavior.

Standard reference: this first-order RC charge/discharge analysis is documented in standard electrical engineering textbooks (e.g., Sedra and Smith, Microelectronic Circuits, 8th ed., Section 1.7; Horowitz and Hill, The Art of Electronics, 3rd ed., Section 1.4.3). Capacitor characteristics (tolerance, ESR, leakage, dielectric absorption) are specified per IEC 60384 (Fixed capacitors for use in electronic equipment) part series including IEC 60384-1 (general specification), IEC 60384-4 (fixed aluminium electrolytic capacitors), IEC 60384-14 (fixed capacitors for electromagnetic interference suppression).

Inputs Explained

Resistance (R): This is the total series resistance in the charge or discharge path. In a simple RC circuit, it is the resistor value. But in real circuits, it includes the output impedance of the driving source plus any wiring resistance. For example, a 5 V logic output might have a source impedance of 25 Ω to 50 Ω. If you use a 1 kΩ timing resistor, the actual R is 1025 Ω to 1050 Ω, adding about 2.5-5% to the time constant. Engineers often forget this and wonder why the measured time is slightly longer than calculated.

Capacitance (C): Use the nominal value from the capacitor datasheet, but remember that electrolytic capacitors typically have a tolerance of ±20% and can drift with temperature and age. Ceramic capacitors (Class 2, e.g., X5R, X7R) can lose up to 80% of their capacitance when DC bias is applied. For timing-critical circuits, use film capacitors (e.g., polyester, polypropylene) with ±5% or ±1% tolerance. The calculator assumes an ideal, constant capacitance, a significant simplification.

Source/Initial Voltage (Vs or Vi): This must be the actual voltage present at the start of the event. In a charging scenario, if the supply is a battery that sags under load, the effective Vs may be lower than the open-circuit voltage. Similarly, for discharge, the initial voltage is whatever the capacitor was charged to, which may not be exactly Vs if leakage or previous loading occurred. Measure these under operating conditions.

Target Voltage (Vt): This is the threshold voltage that triggers the next stage. For a CMOS input, it might be 0.7 × Vdd (e.g., 3.5 V for a 5 V supply). For a comparator reference, it is a precise value set by a voltage divider. The calculator will produce an error if Vt ≥ Vs for charging or Vt ≥ Vi for discharging, because the capacitor never reaches or exceeds the source voltage; it only asymptotically approaches it.

Worked Example

Scenario: You are designing a power-good delay for a 5 V supply that must hold off a 3.3 V logic enable until the supply is stable. The enable input triggers at 3.3 V. You have a 100 kΩ resistor and a 10 µF capacitor. Calculate the charge time.

Metric (SI) Calculation:

Step 1: Calculate τ = R × C = 100,000 Ω × 10 × 10⁻⁶ F = 1.0 s

Step 2: Apply charging formula: t = -τ × ln(1 - Vt / Vs) = -1.0 × ln(1 - 3.3 / 5.0) = -1.0 × ln(0.34)

Step 3: Solve: ln(0.34) ≈ -1.0788, so t = -1.0 × (-1.0788) = 1.0788 s

Unit consistency check: RC timing uses SI units universally (ohms × farads = seconds). Practical engineering shortcuts:

kΩ × µF = ms (10³ × 10⁻⁶ = 10⁻³)
MΩ × µF = s (10⁶ × 10⁻⁶ = 10⁰)
kΩ × nF = µs (10³ × 10⁻⁹ = 10⁻⁶)

For the worked example: 100 kΩ × 10 µF = 1000 ms = 1.0 s. Always verify: if R is in kΩ and C in µF, τ comes out in milliseconds; convert to seconds by dividing by 1000.

Interpretation: The capacitor reaches 3.3 V in t = 1.08 s, just over one time constant. Tolerance analysis:

Threshold tolerance (±10%): At Vt = 3.63 V (high): t = -1.0 × ln(0.274) = 1.294 s. At Vt = 2.97 V (low): t = -1.0 × ln(0.406) = 0.902 s. Threshold-only window: 0.90-1.29 s.

Component tolerance (R = 100 kΩ ±5%, C = 10 µF ±20%): τ_min = 95,000 Ω × 8 µF = 0.76 s; τ_max = 105,000 Ω × 12 µF = 1.26 s.

Worst-case combined window (extreme threshold and extreme component tolerance in same direction): t_min = 0.74 s (low threshold + fast components); t_max = 1.63 s (high threshold + slow components).

Design decision matrix:

(1) If specification allows 0.7-1.7 s window: nominal design adequate.

(2) If specification requires 1.0-1.5 s window: tighten to 1% film capacitor (±1%) and 1% metal-film resistor; revised window approximately 0.95-1.20 s.

(3) If specification requires sub-100 ms tolerance: replace RC delay with crystal-referenced timer (microcontroller GPIO or dedicated timer IC like Texas Instruments TPL5010) for ±1% accuracy across temperature and voltage.

What the Result Means

The calculated time is the theoretical time for an ideal RC circuit. In practice, classify the result by application range to verify reasonableness:

Below 1 ms (signal conditioning, high-speed switching): Typical for RF filtering, oscilloscope probe compensation, or analog signal anti-aliasing. Example: 1 kΩ × 1 nF = 1 µs. If your application required a 1-second delay and the result is microseconds, check unit conversion errors (kΩ × nF gives µs, not ms or s).

1-100 ms (control systems, debouncing): Typical for switch debouncing, mechanical relay timing, soft-start circuits. Example: 10 kΩ × 1 µF = 10 ms.

100 ms to 10 s (power-up sequencing, watchdog timers): Typical for microcontroller power-on-reset delays, supply soft-start, or sequencing logic. Example: 100 kΩ × 10 µF = 1 s (matches the worked example).

Above 10 s (slow timers, sample-and-hold): Long delays where capacitor leakage becomes significant. Example: 1 MΩ × 100 µF = 100 s, but at this RC product, electrolytic capacitor leakage (several µA per IEC 60384-4 for aluminum electrolytics) creates a steady-state error: the capacitor may never reach the target voltage. For long-duration timing, use crystal oscillator with counter, not RC.

A concrete decision rule: if the calculated time is within ±20% of the required delay, perform a tolerance analysis. Calculate the worst-case (minimum and maximum) times using the extreme values of R, C, and Vt. If the worst-case window fits within your specification, proceed to prototyping. If not, either tighten component tolerances (e.g., use 1% resistors and 5% film capacitors) or adjust the RC product. For tolerance stacking analysis methodology, refer to standard electronics references such as Horowitz and Hill, The Art of Electronics (3rd ed., Chapter 1) or manufacturer application notes (e.g., Texas Instruments SLOA098, ON Semiconductor AND8311). The general approach: compute worst-case t using R_min × C_min × Vt_max for the fast case and R_max × C_max × Vt_min for the slow case, then verify the resulting window fits the timing specification.

Common Mistakes

Mistake #1: Using target voltage equal to or above the source voltage in charging mode. The capacitor voltage asymptotically approaches Vs but never reaches it. Mathematical behavior:

Vt = Vs case: 1 − Vt/Vs = 0; ln(0) approaches −∞; t = −τ × (−∞) approaches +∞ (infinite time). The calculator should return an "asymptotic — never reaches" message rather than a finite number.

Vt > Vs case: 1 − Vt/Vs < 0; ln(negative) is undefined in real numbers. The calculator returns a domain error.

In real circuits, you cannot charge to exactly Vs in finite time. Always leave a margin: charging to 99% of Vs takes about 4.6τ; charging to 95% takes 3τ; charging to 90% takes 2.3τ. For digital logic threshold circuits, target Vt = 0.7 × Vdd (CMOS V_IH), which takes about 1.2τ from zero.

Mistake #2: Forgetting that larger resistance or capacitance increases timing linearly. Doubling R or C doubles τ and therefore doubles the time to any given fraction of the final voltage (except when Vt is near Vs, where the logarithm amplifies the effect). Engineers attempting to speed up a slow RC circuit by reducing R may forget that the driving source impedance becomes significant when R is small. For typical RC timing design with R in the 1 kΩ to 100 kΩ range, source impedance (25-50 Ω for logic outputs, 100-1000 Ω for op-amp outputs) adds 0.5-5% to total resistance, usually negligible. But for low-resistance applications (R < 1 kΩ), source impedance can dominate the time constant calculation.

Mistake #3: Ignoring capacitor leakage and ESR. Electrolytic capacitors can have leakage currents of several µA. In a high-impedance circuit (e.g., R = 1 MΩ), the leakage current can create a voltage divider that prevents the capacitor from ever reaching the target voltage. Similarly, ESR (equivalent series resistance) shifts the time constant by adding to the charging resistance. For low-ESR ceramic capacitors, this is negligible, but for electrolytics in high-current applications, it can be significant. Always check the capacitor datasheet for leakage and ESR, especially for results above 10 s.

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When This Method Is Not Enough

The simple RC model assumes an ideal resistor, an ideal capacitor, and no other circuit elements. In reality, the capacitor may be loaded by the input impedance of the next stage (e.g., a CMOS gate input capacitance of 10 pF, or a bias current of 1 µA). If the load draws significant current, the effective time constant changes. For example, a 1 MΩ resistor charging a 1 µF capacitor with a 1 µA load creates a steady-state error: the capacitor never reaches Vs, but rather Vs − I_load × R = Vs − 1 V. The charging formula becomes inaccurate.

Another limitation is frequency-dependent behavior. The RC model is a first-order low-pass filter, but at high frequencies, parasitic inductance and dielectric absorption in the capacitor cause deviations. For timing intervals below 1 µs, you must consider the capacitor's self-resonant frequency. Similarly, for very long intervals (hours), capacitor leakage dominates. The calculator is a screening tool, not a final design validation. Always verify with bench measurement before production.

FAQ

How do I calculate the time to charge a capacitor to a specific voltage?

Use the formula t = -R × C × ln(1 - Vt / Vs), where R is the series resistance in ohms, C is the capacitance in farads, Vs is the source voltage, and Vt is the target voltage. Ensure Vt is less than Vs; otherwise, the time is infinite.

What is the RC time constant and how does it relate to charge time?

The RC time constant τ = R × C is the time to reach 63.2% of the final voltage during charging. One time constant gives 63.2%, two give 86.5%, and five give 99.3%. The charge time to any threshold is a multiple of τ determined by the natural logarithm.

Can I use this calculator for discharge time?

Yes. For discharge from an initial voltage Vi to a target Vt, use t = -R × C × ln(Vt / Vi). The same RC time constant applies, but the logarithm uses the ratio of remaining voltage. Discharge to 36.8% of Vi takes one time constant.

Why does my measured charge time differ from the calculated value?

Common causes include component tolerances (resistor ±1% or ±5%, capacitor ±20% or more), source impedance adding to R, capacitor leakage (especially electrolytics), and loading from the measurement probe or subsequent circuitry. Always account for worst-case tolerances.

What happens if I set the target voltage equal to the source voltage?

The formula gives an infinite time because the capacitor never reaches the source voltage in finite time. In practice, you cannot charge to exactly Vs; you can only approach it asymptotically. Use a target voltage of, say, 99% of Vs (which takes about 4.6τ).

How does capacitor leakage current affect long-duration RC timing?

Capacitor leakage current creates a steady-state voltage error that becomes significant for high-resistance, long-duration timing applications. Per IEC 60384-4 typical specifications: aluminum electrolytic capacitors have leakage current up to 0.01 × C × V (µA) after 1 minute, where C is in µF and V in volts. For a 100 µF, 25 V capacitor, leakage is approximately 25 µA at full rated voltage. Tantalum capacitors have similar leakage with a longer stabilization time (5 minutes). Film capacitors (polyester, polypropylene) have leakage typically below 10 pA, negligible for most timing applications. Ceramic Class 1 (C0G/NP0) capacitors are similar. In a 1 MΩ × 100 µF RC circuit, leakage of 10 µA creates a 10 V drop across the leakage path at 1 MΩ, preventing the capacitor from reaching Vs. For timing intervals above 10 s, use film capacitors or low-leakage tantalum, or migrate to crystal-referenced timer ICs.

What about RC timing for AC circuits and signal filtering?

The formula t = -RC × ln(1 - Vt/Vs) applies to step-response (DC charging/discharging). For AC signal filtering, the same RC product becomes the cutoff frequency parameter f_c = 1/(2π × RC) per standard circuit analysis. A low-pass filter (R series, C shunt to ground) has a -3 dB cutoff at f_c; a high-pass filter (C series, R shunt to ground) has its -3 dB cutoff at the same f_c. The RC = 100 kΩ × 10 µF = 1 s from the worked example corresponds to f_c = 1/(2π × 1) = 0.16 Hz, useful only for DC filtering. Practical AC filters use much smaller RC products (kΩ × nF for kHz cutoffs, kΩ × pF for MHz cutoffs). For AC analysis, use a separate frequency-domain calculator rather than this charge/discharge time tool.

Related Calculation to Check Next

After you have an initial RC timing estimate, verify that the RC circuit can drive its load. Calculate the input impedance of the following stage (e.g., the input resistance and capacitance of a logic gate or comparator). If the load impedance is comparable to the timing resistor, it will alter the time constant. For related capacitor sizing in power systems applications, see How to Calculate Capacitor Bank Size for Power Factor Correction (kVAR-based bank sizing for utility power factor correction) and the Capacitor Sizing for Power Factor Correction Calculator (motor-level capacitor selection per NEC 460.7). If the capacitor is used for power supply filtering, also check the ripple voltage using the capacitor sizing for ripple calculation, which uses a different model (linear approximation of exponential decay).

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